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TDDB (Time-Dependent Dielectric Breakdown) Evaluation System

  • Overview of Equipment
  • Features
System configuration according to measurement count
The TDDB Evaluation System has a SM module per channel to enable voltage and current output and monitoring.
The SM module comprises one board of four SMUs, with a standard configuration (36 SMUs) of units that can house up to 9 boards. It can be expanded up to 9 sets (324 SMUs) on the wafer level.
Figure: Connection to DUT
Connection to DUT
High accuracy current and voltage application measurement
The current features a 9 range and a measurement resolution with a maximum current of ±100 mA and a minimum current of ±1 pA. The voltage has a resolution with a maximum voltage of ±50 V and a minimum voltage of ±1 mV, thereby enabling application and measurement with a wide range and high accuracy.
Figure: Measurement terminal connection diagram (TDDB)
Measurement terminal connection diagram (TDDB)
Analytical application software (E-Graph) provided
You can check the progress status and measurement values of a test in real-time as they update automatically. After measurement, you can create a Weibull plot and measure the life of the specimen using the measurement result. Data can be converted with Excel or other spreadsheet software.
Supports a wide range of evaluation items
This system can perform TDDB evaluation at the wafer level or LCD glass substrate level, and it supports measurement items such as QDB/TZDB evaluation with 1-terminal (Gate - GND common), 2-terminal (Gate - GND), and 4-terminal (Drain, Gate, Base, Source) settings.
With the use of optional software, this system can also evaluate the FET single unit transistor characteristics.
Figure: Number of DUT processes
Number of DUT processes
* The optional software is required to evaluate the FET single unit transistor characteristics.
Use software to change pin assignments
Change the terminal settings by cabinet (36 SMUs ×3 sets).
In addition, changes can be made to the pad layout for the same number of terminals on the application for each multi SMU, thereby enabling changes to the pin assignments with the same probe guard.